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From a linked article on shift registers:

> To avoid these astronomical prices, some computers used the cheaper alternative of shift register memory.

Might be a direction for 2026 too?


The overwhelming majority of UNIX-like software is available in the package managers right now for major BSDs.

I didn't grow up in a 3rd world country but had the same experience, bar running games I don't own. Not everyone in the west had parents that wanted to just spend thousands on hardware that seemed to be obsolete next year, or any means of making that money. And I've never stopped using sub-par hardware, to this day I enjoy squeezing every drop of performance from cheap pre-owned stuff.

Just a point that the constexpr/const use in that C++ code makes no difference to output, and is just noise really.

Relatively new, we're about 16 years down the road.

16 years from the START of getting an idea "why don't we make a new ISA?".

Less than 7 years from ratification of the initial RV{32,64}GC spec.

Less than 5 years from the first mass-produced roughly original Raspberry Pi level $100 SBC: AWOL Nezha, shipped June 2021.


Can't see the images as imgur has geoblocked the UK.



Dude that's not a 'puddle' as the article claims, that's a body of water that it's not even visually obvious whether it's safe to drive through. Maybe I'm a bad driver but I'd hesitate to drive through that in a small car either.


I think the difference is the prior knwoldege a commuter has of that section of road. Does it always flood shallowly in heavy rain?


Even without prior knowledge, seeing others safely navigate the same section will lower your estimated risk.


The amount of water will depend on the rain, so we don't know how shallow it is even with prior knowledge.


If you drive the road every day, you probably do. If you can see someone drive through it (perhaps someone who knows the area well and knows how deep it is based on puddle width), you definitely do.


Persona just got hacked so we're off to a good start.


Not just similar, it's exactly the same issue caused by exactly the same kind of change, and is probably hard to fix for almost exactly the same behind-the-scenes complexity on Windows.


Problem RISC-V has is there's no middle-ground.

The specification for an architecture is meant to be useful to anyone writing assembly, not just to people implementing the spec. Case in point x86 manuals aren't meant for Intel, they're meant for Intel's customers.

There is a lot of cope re the fact RISC-V's spec is particularly hard to use for writing assembly or understanding the software model.

If the spec isn't a 'manual' then where's the manual? If there's just no manual then that's a deficiency. If we only have 'tutorial's that's bad as well, a manual is a good reference for an experienced user, and approachable to a slightly aware beginner (or a fresh beginner with experience in other arch's); a tutorial is too verbose to be useful as a regular reference.

Either the spec should have read (and still could read) more like a useful manual, or a useful manual needs to be provided.


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