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Dylan16807
on Aug 8, 2016
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Why do CPUs have multiple cache levels?
Fanout isn't instant. If you want to power 2^N gates, you need N time to power them all from a source signal.
cfallin
on Aug 8, 2016
[–]
Yep, the long bitlines are a large factor in timing for register files. The timing is something like O(n) for n storage lines because it grows linearly with capacitance.
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