> RISC is a win until you want to go superscalar and have more than one instruct... | Hacker News

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gpderetta on Feb 27, 2017 | parent | context | favorite | on: The “high-level CPU” challenge (2008)

> RISC is a win until you want to go superscalar and have more than one instruction per clock.

Uh? ARM, SPARC, POWER are doing just fine in the superscalar domain (heck, power8 is 8 wide!). I don't think they have any particular advantage with regard to CISCy x86 (other than a simpler, more scalable, decoder) but don't have any disadvantage either.

kutkloon7 on Feb 27, 2017 [–]

You're right. RISC is more suitable for superscalar processing. According to https://en.wikipedia.org/wiki/Superscalar_processor#History, RISC microprocessors were the first ones to implement superscalar execution.

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