32-bit Arm has some features that make it less RISC-like than others:
- Predication as a major architectural feature -- every instruction can be conditionally executed
- Complex load-store instructions: ldm/stm can operate on a large set of registers in a single instruction, including performing a branch by loading into the instruction pointer
- 16-bit Thumb instruction format (also optionally present in RISC-V and newer MIPS)
64-bit Arm mostly drops all of the above and is basically a traditional RISC implementation.
