Without starting the argument, I'd like to know your thoughts - for me as someone who operates several layers of abstraction away from the hardware, the choice seems mostly arbitrary (like Fahrenheit vs Celsius) with each option having both benefits and drawbacks.
Fahrenheit and Celsius are just two units of measure on the same temperature scale, running in the same direction.
Big and little endian are more fundamentally different.
Ken's article mentions that the Datapoint 2200 used shift-register memory that read out one bit at a time, along with a one-bit arithmetic unit:
> Another consequence of shift-register memory was that the Datapoint 2200 was a serial computer, operating on one bit at a time as the shift-register memory provided it, using a 1-bit ALU. To handle arithmetic operations, the ALU needed to start with the lowest bit so it could process carries. Likewise, a 16-bit value (such as a jump target) needed to start with the lowest bit. This resulted in a little-endian architecture, with the low byte first. The little-endian architecture has remained in Intel processors to the present.
Now consider how you add or subtract, or multiply or divide two numbers by hand, where you're working with one decimal place at a time.
Do you start from the big end of the numbers, or the little end?
And if the numbers aren't the same length, where do you align them? At the little end.
If you were going to write a routine to add to numbers that were written in ASCII, you’d necessarily need to start in the ones position moving to the tens and the hundreds. The computer in the article originally had serial memory. Those values would also need to cycle from the smallest value to the largest. The earliest computers were also serial computers because they were the cheapest to produce.
The choice for big-endian is driven by one thing only - humans can read memory as they are familiar with. Which is no kind of hardware decision at all.
