>> Flow has shown that its technology works in FPGA-based tests
>> Flow's technology enhances the CPU's functionality by managing tasks at nanosecond intervals, allowing multiple processes to occur simultaneously, thereby increasing throughput without changing the CPU’s clock speed or architecture.
The connections between things in a FPGA are considerably longer than within a dedicated CPU. I have doubts that improvements seen on FPGAs would translate directly to dedicated CPUs.
Is this different than existing instruction level parallelism and hyperthreading?
> [CPUs] primary limitation is that as serial rather than parallel processors, they can only do one thing at a time. Of course, they switch that thing a billion times a second across multiple cores and pathways
This is from the article, not the company, but unless I'm misreading it, it's just wrong
My understanding of their tech is that it's very similar to Itanium's VLIW architecture. We all know how that ended up... making compilers more complex turned out to be far from ideal.
>> Flow's technology enhances the CPU's functionality by managing tasks at nanosecond intervals, allowing multiple processes to occur simultaneously, thereby increasing throughput without changing the CPU’s clock speed or architecture.
The connections between things in a FPGA are considerably longer than within a dedicated CPU. I have doubts that improvements seen on FPGAs would translate directly to dedicated CPUs.